hatsugai/mc68000-x-2-virtual-memory-system — explained in plain English
Analysis updated 2026-05-18
Study how virtual memory and page swapping work at the hardware level
See a real implementation of a memory management unit built without a dedicated MMU chip
Learn how two processors can cooperate to handle page faults
Reference the design when building retro or educational computer hardware
| hatsugai/mc68000-x-2-virtual-memory-system | 09catho/axon | 0x1-1/revival | |
|---|---|---|---|
| Stars | 13 | 13 | 13 |
| Language | — | JavaScript | C++ |
| Setup difficulty | hard | moderate | hard |
| Complexity | 5/5 | 4/5 | 5/5 |
| Audience | researcher | researcher | developer |
Figures from each repo's GitHub metadata at analysis time.
Requires assembling physical hardware with two MC68000 chips and supporting logic.
This is a hardware experiment that implements a virtual memory system, a technique that lets a computer pretend to have more memory than it physically does, using two MC68000 chips, a classic processor from the late 1970s. The project documents how the author built this from scratch as a personal exploration, and the README is written in Japanese. The two processors are called MPU[0] and MPU[1]. MPU[1] handles normal program execution, while MPU[0] acts as a dedicated helper for managing page swaps. A "page" here means a small fixed-size chunk of memory (4 kilobytes in this design). The virtual memory space covers 8 megabytes of logical address space. The memory management unit, or MMU, is constructed from two static RAM chips rather than a dedicated chip. The first, called TransRAM, translates logical page numbers (the addresses the program thinks it is using) into physical page numbers (where the data actually lives in real memory). The second, called AccessRAM, keeps track of which pages have been read from or written to, including a "dirty bit" that records whether a page has been modified. When the program tries to access a page that has not been loaded into physical memory yet, a page fault signal is generated, MPU[0] takes over the bus, performs the page swap, then hands control back to MPU[1]. A state machine implemented with a single GAL 22V10 chip manages the handoff between the two processors. The board also carries Flash memory for booting and a UART chip for serial communication.
A hardware project that builds a working virtual memory system from scratch using two classic MC68000 processors and discrete memory chips.
Setup difficulty is rated hard, with roughly 1day+ to a first successful run.
Mainly researcher.
This repo across BitVibe Labs
Verify against the repo before relying on details.